The present invention relates to a method of encapsulating a quad flat non-leaded (QFN) package, andmore particularly to a method of encapsulating a quad flat non-leaded package with the lead frame protruding from the molding material.
With increased improvement in semiconductor technology, operating speed and design complexity thereof are continuously increased. To respond to the needs of improved semiconductor technology, efficient semiconductor packing technologies are desirable, such as high-density packaging. The QFN package is one popular of low-pin-count high-density package type.
A conventional QFN package typically comprises a lead frame based chip size package (CSP). The leadless CSP is popularly employed in low-pin-count packages due to advantages such as shortened signal trace enhancing signal decay.
FIG. 1 is a cross-sectional view of a conventional quad flat non-leaded package. FIG. 1A is a bottom view of the conventional quad flat non-leaded package shown in FIG. 1. A conventional QFN package 100 comprises a chip 110, a chip pedestal 132, several pins 138, a molding material 150. The chip 110 includes an active surface 112 having several bonding pads 116 thereon. The chip pedestal 132 has an upper surface 134 and a bottom surface 136. The pins 138 also have an upper surface 140 and a bottom surface 142. The rear surface 114 of the chip 110 is attached to the upper surface 134 of the chip pedestal 132. The leads 144 are electrically connected to the bonding pads 116 and pins 138, respectively. In addition, the molding material 150 covers the chip 100, the leads 144, the upper surface 134 of the chip pedestal 132, the upper surface 140 of the pins 138. Ideally, the bottom surface 136 of the chip pedestal 132 and bottom surface 142 of the pins 138 are exposed.
In a conventional method for encapsulating a quad flat non-leaded package, the bottom surface 136 of the chip pedestal 132 and bottom surface 142 of the pins 138 are attached to a adhesive tape (not shown) fixed on a supporter. The chip 110 is than attached to the upper surface 134 of the chip pedestal 132 in contact with the rear surface 114 of the chip 110. A wire bonding is performed, electrically connecting the bonding pads 116 to the pins 138 through the leads 144. Encapsulation, removal of the adhesive tape and formation of the pins are subsequently performed.
FIG. 2 is a cross-sectional view of encapsulation of a conventional quad flat non-leaded package. As shown in FIGS. 1A and 2, high flowing rate and high temperature the molten molding material 150 facilitate peeling between the tape 160 and bottom surface 136 of the chip pedestal 132, thus, a gap 170 is formed. Meanwhile, the molten molding material 150 enters the gap 170, resulting in molding material spills 180. Accordingly, an extra polishing is needed to remove the molding material spills 180, thus process complexity is increased. Additionally, a heat-resistant tape must be employed to withstand high temperatures of over 200° C. The heat-resistant tape increases costs and easily leaves residual molding material on the lead frame, contaminating the lead frame.
Accordingly, a more reliable encapsulation of a quad flat non-leaded (QFN) package, capable of avoiding molding material spills, residual molding material contamination, and reducing process time and costs, is desirable.